NVIDIA Says What It Will Take to Run Its AI Software on RISC-V Chips
At Hot Chips 2026, a major chip conference held August 23–25 at Stanford University, NVIDIA laid out the specific requirements for making its CUDA software platform work on RISC-V processors. The effort builds on an announcement from the 2025 RISC-V Summit in China, where NVIDIA first said it would bring CUDA to RISC-V alongside existing support for x86 and ARM processors (RISC-V International).
To understand why this matters, a little background helps. CUDA is NVIDIA's software for programming its graphics processors (GPUs) to do heavy-duty computing work — things like training AI models and running scientific simulations. Today, CUDA runs on computers powered by x86 processors (the kind Intel and AMD make) or ARM processors (the kind used in most smartphones and some servers). RISC-V is different: it is an open instruction set, meaning anyone can build chips based on it without paying licensing fees. Until now, CUDA has not been able to run on RISC-V processors.
The requirements NVIDIA specified are strict. RISC-V processors must meet a specific standard called the RVA23 profile, which ensures that different chipmakers' RISC-V designs work the same way with software. They must also follow RISC-V server specifications for system-on-chip and platform design. On the connection side, NVIDIA requires support for PCIe coherency — meaning the processor and attached devices like GPUs can share memory without conflicts — and peer-to-peer PCIe communication, which lets devices exchange data directly without going through the processor each time. Together, these requirements limit eligibility to server-grade RISC-V chips. Consumer or small-scale RISC-V processors do not qualify (Chips and Cheese).
The supporting infrastructure for RISC-V in servers has been catching up. In 2025, the UEFI Forum added RISC-V support to ACPI, a standard that lets an operating system discover and manage hardware at startup. The RISC-V BRS (Boot and Runtime Services) specification was also finalized in 2025 with ACPI included. These standards cover the startup and device-management steps that an operating system and a platform like CUDA rely on when running on a new type of processor. Their completion removed gaps that would otherwise have made a CUDA port to RISC-V impractical (Chips and Cheese).
NVIDIA also presented requirements for something called NVLink Fusion. NVLink is NVIDIA's high-speed connection for linking GPUs to each other and to the main processor. NVLink Fusion lets other chip designers license this connection technology and build it into their own chips. Combined with CUDA support for RISC-V, this opens a path where a RISC-V chip maker could build a system that uses NVIDIA's connection technology and software without depending on x86 or ARM processors as the host (Chips and Cheese).
NVIDIA's use of RISC-V is not entirely new. At Hot Chips 34 in 2022, NVIDIA presented its Hopper GPU design, which included more than 1,000 small RISC-V cores built directly onto the GPU chip itself. Those cores handled internal management tasks, where RISC-V's flexibility and lack of licensing fees were useful. The new CUDA-on-RISC-V effort is different: it targets the main processor that runs the CUDA software, sends instructions to the GPU, and manages memory across the system.
The broader context here is that RISC-V has been maturing as a processor design suitable for data centers. The RVA23 profile, the server specifications, the boot standards, and ACPI support together form the set of requirements a RISC-V server needs to work with standard system software. NVIDIA's CUDA requirements build on that foundation, specifying exactly which features a RISC-V system must have to serve as a CUDA host.
The combination of CUDA portability and NVLink Fusion is worth flagging. Separately, each broadens NVIDIA's reach in a different direction: CUDA adds support for a new processor type, and NVLink extends beyond NVIDIA's own chips. Together, they sketch a system where a third-party RISC-V server processor with a licensed NVLink connection could serve as a full host for NVIDIA GPUs, running CUDA workloads over a fast, shared connection. Whether any RISC-V vendor currently ships hardware meeting all of these requirements is not something NVIDIA addressed in the presentation as reported. The requirements set the bar; the silicon has to clear it.
Hot Chips 2026 presentation slides are posted daily at 7:00 AM PDT, and in-person attendance for the conference is sold out (Hot Chips). NVIDIA is using its Hot Chips 2026 participation to showcase its Accelerated Computing platform for AI data centers (NVIDIA).
For RISC-V supporters, the CUDA requirements give a concrete target rather than a vague promise. The RVA23 profile, server platform compliance, PCIe coherency, and peer-to-peer PCIe together form a checklist that turns the idea of CUDA on RISC-V from a conference announcement into an actual engineering specification. How quickly RISC-V server chips arrive that meet every item on that checklist will determine whether CUDA workloads run on these open processors in production at any scale in the near term.
